In general, an active matrix-type liquid crystal display device includes a liquid crystal panel made of two substrates which sandwich a liquid crystal layer therebetween. On one substrate of the two substrates, a plurality of gate bus lines (scanning signal lines) and a plurality of source bus lines (video signal lines) are arranged in a grid pattern, and a plurality of pixel formation portions are arranged in a matrix so as to correspond to the respective intersections of the plurality of gate bus lines and the plurality of source bus lines. Each of the pixel formation portions includes: a thin film transistor (TFT) that is a switching element having a gate terminal connected to a gate bus line passing through its corresponding intersection and a source terminal connected to a source bus line passing through the intersection; a pixel capacitance for holding a pixel value; and the like. Moreover, on other substrate of the above-described two substrates, in some case, a common electrode that is a counter electrode provided commonly to the plurality of pixel formation portions is provided. The active matrix-type liquid crystal display device is also provided with a gate driver (scanning signal line drive circuit) that drives the plurality of gate bus lines, and a source driver (video signal line drive circuit) that drives the plurality of source bus lines.
Video signals, each of which indicates the pixel value, are transmitted by the source bus lines; however, each of the source bus lines cannot transmit video signals indicating pixel values for a plurality of rows at a time (simultaneously). Therefore, writing of the video signals to the pixel capacitances in the above-mentioned pixel formation portions arranged in the matrix is sequentially performed row by row. Accordingly, the gate driver is constituted by a shift register including a plurality of stages such that the plurality of gate bus lines can be sequentially selected every predetermined period.
In the liquid crystal display device as described above, in some case, although a power supply is turned off by a user, display is not cleared immediately, and an image like an afterimage remains. A reason for this is because, when the power supply of the device is turned off, a discharge path of electric charges held in each of the pixel capacitances is shut off, and residual electric charges are accumulated in each of the pixel formation portions. Moreover, when the power supply of the device is turned on in a state where the residual electric charges are accumulated in each of the pixel formation portions, there occurs deterioration in display quality, such as an occurrence of a flicker caused by a bias of impurities, the bias being based on the residual electric charges. Accordingly, in such an event where the power supply is turned off, for example, all of the gate bus lines are turned to a selected state (ON state), and a black voltage is applied to the source bus lines, whereby the electric charges on the panel are discharged.
Moreover, with regard to the liquid crystal display device, in recent years, a gate driver that is made monolithic is progressed. Heretofore, it has been frequent that the gate driver is mounted as an IC (Integrated Circuit) chip on a peripheral portion of the substrate that constitutes the liquid crystal panel; however, in recent years, the gate driver has gradually come to be directly formed on the substrate. The gate driver as described above is called a “monolithic gate driver” and the like. Moreover, a panel including the monolithic gate driver is called a “gate driver monolithic panel” and the like.
In the gate driver monolithic panel, the above-mentioned method cannot be adopted with regard to the discharge of the electric charges on the panel. Accordingly, in WO 2011/055584, an invention of the liquid crystal display device, which is as described below, is disclosed. In a bistable circuit that constitutes the shift register in the gate driver, a TFT is provided, which includes: a drain terminal connected to a gate bus line; a source terminal connected to a reference potential wire that transmits a reference potential; and a gate terminal that is given a clock signal that operates the shift register. In such a configuration, when the supply of the power supply from the outside is shut off, the clock signal is turned to a high level to turn the above-described TFT to an ON state, and in addition, a level of the reference potential is raised from a gate OFF potential to a gate ON potential. In such a way, a potential of each of the gate bus lines is raised to the gate ON potential, and the residual electric charges in all of the pixel formation portions are discharged. Moreover, in WO 2010/050262, a technology for preventing a malfunction caused by leakage in the TFT is disclosed as an invention relating to the gate driver monolithic panel.